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課程名稱 |
計算機結構
Computer Architecture |
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開課學期 |
102-2 |
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授課對象 |
電機資訊學院 電機工程學系 |
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授課教師 |
吳安宇 |
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課號 |
EE4039 |
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課程識別碼 |
901 43200 |
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班次 |
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學分 |
3 |
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全/半年 |
半年 |
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必/選修 |
選修 |
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上課時間 |
星期二6,7,8(13:20~16:20) |
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上課地點 |
電二106 |
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備註 |
總人數上限：60人 |
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Ceiba 課程網頁 |
http://ceiba.ntu.edu.tw/1022_CA |
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課程簡介影片 |
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核心能力關聯 |
核心能力與課程規劃關聯圖 |
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課程大綱
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為確保您我的權利,請尊重智慧財產權及不得非法影印
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課程概述 |
An entry-level course to learn basic concepts of computer organization (Central Processing Unit (CPU) and CPU + Memory + I/O + Multicore)
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課程目標 |
1. The basic concept of RISC (Reduced Instruction Set Computer), compared with CISC (Complex Instruction Set Computer)
2. The Assembly/Machine language of the MIPS CPU
3. Detailed CPU design:
Instruction set, Data path, Control Unit, Arithmetic Logic Unit (ALU),
Techniques to enhance CPU performance, e.g., pipelining and hazard control
4. Memory hierarchy:
Cache (L1$, L2$, etc.): How to improve data/instruction access time for CPU?
Virtual memory: How to handle program/data that is larger than your physical (main) memory?
5. I/O peripherals:
Know more about I/O Devices and Networking Devices
6. New trend of multi-core CPUs (overview)
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課程要求 |
Prerequisite:
- Switching Circuit and Logic Design (basic)
- Digital System Design (DSD) (optional) – 可同修
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預期每週課後學習時數 |
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Office Hours |
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指定閱讀 |
(Main textbook) David A. Patterson, and John L. Hennessy, “Computer Organization and Design – The Hardware/Software Interface”, 4th Edition, Morgan Kaufman Publishers, Inc., 2009.
(Verilog Coding, optional) J. Cavanagh, “Verilog HDL: Degital design and modeling, ” CRC Press, 2007. |
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參考書目 |
(General) “Structured Computer Organization,” by Andrew S. Tanenbaum, Prentice
Hall, 1999, 4th edition.
(General) "Computer organization and architecture - Designing for performance,"
by William Stallings, 4th edition, Prentice-Hall International, Inc., 1996.
(Advanced reading, graduate/senior level) “Computer architecture: A Quantitative
Approach,” by John L. Hennessy and David A. Patterson, 2007, 4th Edition.
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評量方式
(僅供參考) |
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No. |
項目 |
百分比 |
說明 |
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1. |
Homework |
21% |
every chapter, and assembly writing |
2. |
Midterm exam |
27% |
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3. |
Final exam |
32% |
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4. |
Final Projects |
18% |
Perform survey of modern CPU platform and EDA tools
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5. |
Participation |
2% |
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週次 |
日期 |
單元主題 |
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第1週 |
2/18 |
Course Overview,Chapter 1 Computer Abstractions and Technology |
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第2週 |
2/25 |
Chapter 1 Computer Abstractions and Technology |
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第3週 |
3/04 |
Chapter 2 Instructions Language of the Computer |
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第4週 |
3/11 |
Chapter 3 (Before 3.5) / QtSpim tutorial |
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第5週 |
3/18 |
Chapter 4 The Processor |
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第6週 |
3/25 |
Chapter 4 The Processor |
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第7週 |
4/01 |
Chapter 4 The Processor |
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第8週 |
4/08 |
Chapter 4 The Processor |
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第10週 |
4/22 |
Chapter 5 Memory |
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第14週 |
5/20 |
Chapter 6 Storage and Other IO Topics |
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第15週 |
5/27 |
Chapter 7 Multicores, Multiprocessors, and Clusters |
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第16週 |
6/03 |
Parallel Processing and Multi-core Platform: CUDA |
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